pub struct Cpsr {
pub mode: Mode,
pub fiq_disable: bool,
pub irq_disable: bool,
pub flags: Flags,
}Expand description
The full CPSR (or an SPSR): mode + interrupt-mask bits + the Flags condition codes.
Fields§
§mode: ModeThe active processor mode (see the mode module).
fiq_disable: boolFIQ (fast-interrupt) mask — set to disable FIQ.
irq_disable: boolIRQ mask — set to disable normal interrupts.
flags: FlagsThe N/Z/C/V condition-code flags.
Implementations§
Source§impl Cpsr
impl Cpsr
Sourcepub const fn to_u32(self) -> u32
pub const fn to_u32(self) -> u32
Pack into the 32-bit CPSR/SPSR register layout (Mesen2 ArmV3CpuFlags::ToInt32) — used by
MRS and the (not-yet-ported) exception-entry path. self.mode is masked to its real
5-bit width here too (belt-and-suspenders on top of Regs::switch_mode’s own mask, so a
stray high bit can never leak into the adjacent interrupt-mask/reserved bits regardless of
how mode was set).
Trait Implementations§
impl Copy for Cpsr
impl Eq for Cpsr
impl StructuralPartialEq for Cpsr
Auto Trait Implementations§
impl Freeze for Cpsr
impl RefUnwindSafe for Cpsr
impl Send for Cpsr
impl Sync for Cpsr
impl Unpin for Cpsr
impl UnsafeUnpin for Cpsr
impl UnwindSafe for Cpsr
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more