Struct Cpu 

pub struct Cpu {
    pub regs: Regs,
    pub cycles: u64,
    pub waiting: bool,
    pub stopped: bool,
    /* private fields */
}

WDC 65C816 CPU core.

Holds the architectural Regs register file plus bookkeeping. The model is driven one instruction at a time via Cpu::step; the bus is borrowed for the call’s duration.

Fields

regs: Regs

Architectural register file (A/X/Y/S/D/DBR/PBR/PC/P/E).

cycles: u64

Cumulative CPU cycles consumed across all instructions (one per bus access or I/O cycle).

waiting: bool

WAI latch: the CPU is waiting for an interrupt; cleared when one is taken.

stopped: bool

STP latch: the CPU has been stopped and resumes only on reset.

Implementations

impl Cpu

pub fn step(&mut self, bus: &mut impl Bus) -> u32

Execute one 65C816 instruction against bus, returning the CPU cycles consumed (see the crate docs for the unit). Polls NMI then IRQ at the instruction boundary before fetching; IRQ is honored only when the I flag is clear. If the STP latch is set, the CPU stays halted (one idle cycle returned) until Cpu::reset.

impl Cpu

pub const fn new() -> Self

Construct at power-on (emulation mode). Call Cpu::reset to load PC from the reset vector before stepping.

pub fn reset(&mut self, bus: &mut impl Bus)

Power-on / reset: force emulation mode (E=1, M=1, X=1, I=1, D=0), park the stack at $01FF, clear the WAI/STP latches, and load PC from the emulation RESET vector at $00FFFC/$00FFFD. cycles is left as-is (cumulative counter).

pub fn save_state(&self, w: &mut SaveWriter)

Write the full architectural register file plus the WAI/STP latches and cumulative cycle counter into a "CPU0" section. cyc (the per-instruction accumulator, reset at the start of every Cpu::step) is included too even though a save-state can only ever be taken between instructions (where it’s always 0) — it costs one u32 to round-trip exactly rather than assume that invariant holds for every future caller of this format.

pub fn load_state( &mut self, r: &mut SaveReader<'_>, ) -> Result<(), SaveStateError>

The inverse of Self::save_state.

Errors

SaveStateError on truncated/corrupt input or a section with unconsumed trailing bytes. p is restored via Status::from_bits_truncate, which silently drops any bit outside the flag set instead of erroring — Status covers all 8 bits of the real hardware register, so no encoding of a save-state byte is actually invalid here. x/y/ s/pbr are masked to the widths emulation/Status::X force during normal operation (8-bit X/Y with the high byte forced to zero, S confined to page $01, PBR forced to 0, per docs/cpu.md’s emulation-mode rules) — the same “apply the engine’s own normal-operation invariant on load” reasoning already applied elsewhere in this project.

Trait Implementations

impl Clone for Cpu

fn clone(&self) -> Cpu

Returns a duplicate of the value.

fn clone_from(&mut self, source: &Self)

Performs copy-assignment from source.

impl Debug for Cpu

fn fmt(&self, f: &mut Formatter<'_>) -> Result

Formats the value using the given formatter.

impl Default for Cpu

fn default() -> Self

Returns the “default value” for a type.

impl PartialEq for Cpu

fn eq(&self, other: &Cpu) -> bool

Tests for self and other values to be equal, and is used by ==.

fn ne(&self, other: &Rhs) -> bool

Tests for !=. The default implementation is almost always sufficient, and should not be overridden without very good reason.

impl Eq for Cpu

impl StructuralPartialEq for Cpu