Trait Bus 

pub trait Bus {
    // Required methods
    fn read24(&mut self, addr24: u32) -> u8;
    fn write24(&mut self, addr24: u32, val: u8);

    // Provided methods
    fn access_cycles(&self, _addr24: u32) -> u32 { ... }
    fn advance(&mut self, _clocks: u32) { ... }
    fn poll_nmi(&mut self) -> bool { ... }
    fn poll_irq(&mut self) -> bool { ... }
}

Address-space bus seen by the 65C816.

Timing follows ares sfc/cpu/memory.cpp: the CPU asks the bus how many master clocks an access costs (Bus::access_cycles, ares wait), then interleaves the clock advance (Bus::advance, ares step) around the access so it lands at the hardware-exact instant — a write at the END of its cycle (advance the full cost, then write), a read four clocks before the end (advance cost−4, read, advance 4). This phase matters: it decides the exact hcounter at which a register write becomes visible to the PPU/HDMA (e.g. the HDMAEN mid-scanline latch).

Required Methods

fn read24(&mut self, addr24: u32) -> u8

Read a byte at a 24-bit address (no clock advance — the CPU sequences timing via Bus::advance around this call).

fn write24(&mut self, addr24: u32, val: u8)

Write a byte at a 24-bit address (no clock advance — see Bus::read24).

Provided Methods

fn access_cycles(&self, _addr24: u32) -> u32

Master clocks this access costs (ares CPU::wait): the region-variable access speed (FastROM vs SlowROM, WRAM, I/O). Defaults to the SlowROM/internal-cycle cost of 6.

fn advance(&mut self, _clocks: u32)

Advance the system clock by clocks master ticks (ares CPU::step), ticking the PPU/APU/coprocessor and HDMA in lockstep. Default no-op for buses whose timebase is charged elsewhere (the SA-1 second CPU) or that don’t model timing (unit-test buses).

fn poll_nmi(&mut self) -> bool

Edge-triggered NMI poll (PPU vblank → CPU). Returns true once per high→low edge.

fn poll_irq(&mut self) -> bool

Level-sensitive IRQ poll (PPU HV-IRQ, on-cart coprocessor, APU timer). Honored only when the CPU’s I flag is clear.

Implementors

impl Bus for NullBus