Module bus 

The CPU-side bus trait — the SNES port of RustyNES’s rustynes-cpu::Bus.

The 65C816 has a 24-bit address space ((bank << 16) | addr). It borrows &mut impl Bus for the duration of an instruction; the bus fans the access out to WRAM, the PPU/APU register windows, the controllers, the DMA/HDMA registers, and the cartridge board. The concrete impl is in rustysnes-core; a tiny NullBus here lets the CPU be unit-tested in isolation (the one-directional graph is what makes that possible).

Structs

NullBus

A no-op Bus (all reads open, writes dropped) for unit-testing the CPU in isolation.

Traits

Bus

Address-space bus seen by the 65C816.