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Module primitives

Module primitives 

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Pure, state-free ARM primitives: the barrel shifter, condition codes, and the ALU core.

The barrel shifter, the condition-code checker, and the Add/Sub/logical-op ALU core — each verified against the ARM Architecture Reference Manual’s own documented truth tables. See the parent module (coproc::armv3) doc for the full picture.

Structs§

Flags
The four ARM condition-code flags (CPSR bits 31-28 / N,Z,C,V).

Functions§

add
ARM ADD-family: op1 + op2 + carry_in.
check_condition
Evaluate a 4-bit ARM condition code against the current flags (Mesen2 CheckConditions).
logical_flags
ARM logical-op flag update (AND/EOR/ORR/MOV/BIC/MVN/TST/TEQ, Mesen2 LogicalOp).
rotate_right
ROR by a fixed 1-31 amount with no carry-out tracking (Mesen2’s 2-argument RotateRight).
rotate_right_carry
ROR by a 0..=31 amount, also returning the carry-out (bit shift-1 of value) — Mesen2’s 3-argument RotateRight, used by ArmDataProcessing’s immediate-operand rotate.
shift_asr
ASR (arithmetic shift right, sign-extending) by a register-derived amount 0..=255.
shift_lsl
LSL (logical shift left) by a register-derived amount 0..=255 (Mesen2 ShiftLsl).
shift_lsr
LSR (logical shift right) by a register-derived amount 0..=255 (Mesen2 ShiftLsr). See shift_lsl for the shared shift == 0 no-op contract.
shift_ror
ROR (rotate right) by a register-derived amount 0..=255 (Mesen2 ShiftRor).
shift_rrx
RRX (rotate right extended by 1, through the carry flag; Mesen2 ShiftRrx).
sub
ARM SUB-family: Add(op1, !op2, carry_in, ...).