pub struct Flags {
pub invalid: bool,
pub div_by_zero: bool,
pub overflow: bool,
pub underflow: bool,
pub inexact: bool,
}Expand description
The FCSR cause/flag bits an operation can raise (UM §7.2.2).
§Completeness
All five are modeled for the four arithmetic operations, which compute
through crate::softfloat and so have the exact pre-rounding result
available. inexact and underflow were the two that previously never set
for ordinary rounding — accuracy-ledger C-11 — and detecting them is
precisely why that module exists.
Still not produced anywhere: the unmaskable unimplemented-operation
cause (bit 17), which the VR4300 raises for subnormal operands and results.
It is not an IEEE exception and is not part of this struct; see
CAUSE_UNIMPLEMENTED.
Returned rather than written, because FCSR belongs to
crate::cop1::Cop1Control and an arithmetic helper that reached into it
would need to own it.
Fields§
§invalid: boolInvalid operation — a signaling NaN, or an undefined form like 0 × ∞.
div_by_zero: boolDivision by zero, with a finite non-zero numerator.
overflow: boolThe result overflowed the format’s range.
underflow: boolThe result underflowed to a subnormal or zero.
inexact: boolThe result was not exactly representable.
Implementations§
Source§impl Flags
impl Flags
Sourcepub const fn to_fcsr_bits(self) -> u32
pub const fn to_fcsr_bits(self) -> u32
Pack into the FCSR Cause bits 16..=12 and Flags bits 6..=2.
Both at once because hardware sets them together: Cause is what the
current operation raised, Flags is the sticky accumulation.
Bit 17 (Unimplemented Operation) is not produced here — it is not
an IEEE exception, and it is raised on its own by the conversions via
CAUSE_UNIMPLEMENTED. Documenting the range as 17..=12 implied this
helper could set it, which it cannot.