Module cop1 

COP1 control registers (T-12-006).

CTC1 / CFC1 on FCR31 (the FCSR) and FCR0 (the revision register), and nothing else. FPU arithmetic is Sprint 3 — this module exists for one reason, stated plainly so it does not quietly grow:

n64-systemtest’s entrypoint() calls set_fcsr(...) — which is ctc1::<31> — as its fourth statement (ref-proj/n64-systemtest/src/main.rs). Without COP1 control the suite dies three statements after entry and reports nothing at all, so every COP0 and TLB test in Sprint 2 is unreachable behind it.

Scope discipline

FCSR needs storage with correct bit semantics, not behavior: nothing acts on the rounding mode or the enable bits until COP1 arithmetic lands. Adding an arithmetic path here would make this ticket Sprint 3 by stealth.

Structs

Cop1Control

COP1 control-register state.

Constants

FCR0_REVISION

FCR0 — the FPU implementation/revision register.

FCSR_MASK

The writable bits of FCR31 (FCSR).