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FCR0_REVISION

rustyn64_cpu::cop1

Constant FCR0_REVISION 

Source 
pub const FCR0_REVISION: u32 = 0x0A00;
Expand description

FCR0 — the FPU implementation/revision register.

Read-only. Imp (bits 15:8) is 0x0A, and the revision half is 0x00.

§Imp is NOT the same as PRId’s

This was 0x0B00 on the reasoning that the FPU’s implementation number matches the CPU’s — and the N64brew Wiki says so outright: “All VR4300 units will report 0x0B (11) for the implementation number” (n64brew_wiki/markdown/VR4300.md). That is wrong, and it is wrong in this project’s designated primary hardware reference, which is worth knowing before trusting the wiki on a single-value claim.

Two independent sources give 0x0A00:

  • n64-systemtest asserts it directly, and it runs on real hardware.
  • cen64 hardcodes 0xa00 with the comment “fpu version of both 0xb22 and 0xb10 N64s” — i.e. checked against two console revisions.

PRId.Imp really is 0x0B; the two registers identify different units, and the near-identical values are what makes the conflation easy. Accuracy ledger S-4.