pub const FCSR_MASK: u32 = 0x0183_FFFF;Expand description
The writable bits of FCR31 (FCSR).
Bits 25 and 22..=18 are unused on the VR4300 and read zero. Everything else
is software-writable, including the Cause bits — software clears them by
writing, which is how an FP exception handler acknowledges.
| Bits | Field |
|---|---|
| 24 | FS — flush denormals to zero |
| 23 | C — condition |
| 17..=12 | Cause (unimplemented, invalid, div0, overflow, underflow, inexact) |
| 11..=7 | Enable |
| 6..=2 | Flags |
| 1..=0 | RM — rounding mode |