Expand description
The narrow bus interface the DMA controller drives.
The DMA controller moves bytes between the A-bus (the 24-bit CPU address space — WRAM,
ROM, SRAM) and the B-bus (the $2100-$21FF PPU/APU register window, addressed by its
low byte). Keeping this a trait decouples crate::dma::Dma from the concrete crate::Bus
so the transfer logic is unit-testable in isolation. The A-bus invalid-region rules (DMA
cannot touch $2100-$21FF, $4000-$43FF via the A-bus) and the WRAM↔WRAM exclusion are
enforced by the concrete Bus impl, which returns open bus / drops the write there.
Traits§
- DmaBus
- Read/write split across the SNES A-bus (24-bit) and B-bus (
$21xx) for the DMA controller.