Expand description
The ST018 board — the ARMv3 (ARM6) coprocessor wired into a cartridge.
The one confirmed commercial cart is Hayazashi Nidan Morita Shogi 2 (SETA, 1995,
Japan-only; internal title NIDAN MORITASHOGI2) — a LoROM cart (512 KiB ROM + 8 KiB
battery-backed SRAM) using the chip’s ARM core to strengthen its shogi AI. Confirmed against
two independent sources: Mesen2’s own header detection (BaseCartridge::GetCoprocessorType,
RomType high nibble $F + CartridgeType == 0x02) and ares’ heuristic detector
(mia/medium/super-famicom.cpp, the identical cartridgeTypeHi==0xf && cartridgeSubType==2
signature at the extended-header byte $xFBF) — see docs/st018-arm-notes.md for the full
research trail, including the earlier (wrong) assumption that this chip was Star Ocean’s
(Star Ocean uses S-DD1 only; no ARM coprocessor). This project’s own crate::header
parser doesn’t read $xFBF for the OTHER $F-nibble customs (CX4/SPC7110/S-RTC all resolve
by title match instead, after an earlier investigation found that byte unreliable for THOSE
chips against a real Mega Man X2 dump) — crate::header’s coprocessor_from_chipset
mirrors that same title-match convention here rather than introducing a new header field this
codebase has otherwise deliberately chosen not to trust.
Board/bus protocol ported from Mesen2’s St018 (Core/SNES/Coprocessors/ST018/St018.cpp),
architecturally an SA-1-style deterministic master-clock catch-up (Run(), called before
every register access and at end-of-frame in the reference; here driven every single master
tick by Board::coprocessor_tick instead — strictly more granular, functionally
equivalent, and avoids needing any rustysnes-core-side plumbing since — unlike SA-1’s
second 65C816 — this ARM core is entirely self-contained within rustysnes-cart already).
SNES-side register window $00-3F,$80-BF:$3000-$3FFF (the whole block, not just
$3800-38FF as boards.bml implies at a glance): $3800 (read: pull one byte the ARM
placed for the SNES), $3802 (write: push one byte to the ARM; read: clear the ack flag),
$3804 (status on read; a 1->0 write transition resets the ARM, preserving its own cycle
counter). ARM-side 32-bit address space (top nibble selects region): 0x0 = 128 KiB PRG ROM,
0x4 = the same handshake registers mirrored in, 0xA = 32 KiB data ROM, 0xE = 16 KiB
work RAM. A firmware dump is a single combined 0x28000-byte file (PRG then data,
docs/st018-arm-notes.md) — never bundled, user-supplied only (docs/adr/0003).
Structs§
- St018
Board - A cartridge carrying an ST018 (Hayazashi Nidan Morita Shogi 2’s ARMv3 coprocessor).