pub struct Divide {
pub input: u16,
pub output: u16,
pub pending: bool,
}Expand description
The reciprocal unit’s staging latches.
VRCP/VRSQ take a 16-bit operand, but the two-instruction VRCPH+VRCPL
sequence feeds them a 32-bit one: the H instruction latches the high
half into input and sets pending, and the following L sees it and
combines. pending is what distinguishes “a high half was just staged” from
“there is a stale value in the latch” — without it, an L instruction issued
on its own would silently consume whatever the last H left behind.
Fields§
§input: u16The high half staged by a VRCPH/VRSQH.
output: u16The high half of the last result, which VRCPH/VRSQH reads back.
pending: boolWhether input was staged by the immediately preceding instruction.
Trait Implementations§
Source§impl<'de> Deserialize<'de> for Divide
impl<'de> Deserialize<'de> for Divide
Source§fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
fn deserialize<__D>(__deserializer: __D) -> Result<Self, __D::Error>where
__D: Deserializer<'de>,
Deserialize this value from the given Serde deserializer. Read more
impl Copy for Divide
impl Eq for Divide
impl StructuralPartialEq for Divide
Auto Trait Implementations§
impl Freeze for Divide
impl RefUnwindSafe for Divide
impl Send for Divide
impl Sync for Divide
impl Unpin for Divide
impl UnsafeUnpin for Divide
impl UnwindSafe for Divide
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
Source§fn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more