pub struct Format {
pub p: u32,
pub width: u32,
pub bias: i32,
}Expand description
The parameters of an IEEE-754 binary interchange format.
Held as data rather than as a type parameter so that one implementation serves both precisions. A second copy of this logic specialized per format is exactly how the two diverge.
Fields§
§p: u32Significand bits including the implicit leading one (24 / 53).
width: u32Total width in bits (32 / 64).
bias: i32Exponent bias (127 / 1023).
Implementations§
Source§impl Format
impl Format
Sourcepub const fn man_bits(self) -> u32
pub const fn man_bits(self) -> u32
Stored mantissa bits — one fewer than Format::p, the implicit bit
not being stored.
Sourcepub const fn max_biased(self) -> u32
pub const fn max_biased(self) -> u32
The all-ones exponent field, which encodes infinity and NaN.
Sourcepub const fn min_lsb_exp(self) -> i32
pub const fn min_lsb_exp(self) -> i32
The exponent of the least significant bit of the smallest subnormal
— -149 for f32, -1074 for f64.
This is the floor the rounding step clamps to, and it is what makes a result subnormal rather than merely small.
Sourcepub const fn max_finite(self) -> u64
pub const fn max_finite(self) -> u64
The largest finite value’s encoding, magnitude only.
Sourcepub const fn default_nan(self) -> u64
pub const fn default_nan(self) -> u64
The NaN the VR4300 delivers as the result of an invalid operation.
0x7FBF_FFFF / 0x7FF7_FFFF_FFFF_FFFF — the significand’s MSB is
clear, which by IEEE-754:2008 would make the result of every invalid
operation a signaling NaN, absurdly re-trapping on first use.
It is not absurd, because the VR4300 uses the legacy MIPS
convention, where MSB set means signaling. Under its own rules this
is an ordinary quiet NaN. See fpu::is_snan_f32 and accuracy ledger
C-12; this value is the corroboration that the convention really is
inverted rather than the tests being odd.