Function load_interlocks 

pub const fn load_interlocks(
    load_rt: u8,
    rs: u8,
    rt: u8,
    same_reg_file: bool,
) -> bool

Does a load into load_rt interlock with the following instruction?

rs / rt are the raw encoded fields of the next instruction, deliberately named for the encoding rather than for operands — the hardware checks the fields whether or not they are used as sources, and naming them next_rs/next_operand would imply a semantics the check does not have.

Reproduces the hardware’s imprecision, which is the specification here — emulating precise behavior is the bug. From n64brew_wiki/markdown/VR4300.md § Microarchitecture → Load Delay Interlock:

• Matches the load’s rt against the next instruction’s rs or rt field, “whether or not they are actually used as a source”. So a load followed by LUI into the same register stalls, and two consecutive loads into the same register stall.
• A load into $zero never interlocks.
• GPR loads interlock only with non-float instructions, and FPR loads only with float instructions.