pub const RENDER_DOT: u16 = 276;Expand description
The dot at which a visible scanline’s composited output becomes final for that line.
The SNES hardware fact behind this: a line’s own per-line HDMA transfer (rustysnes-core‘s
HDMA_RUN_DOT) fires at hcounter 1104 = dot 276, strictly after real hardware’s per-pixel
active-region output for that same line has already completed (ares’ cycleRenderPixel()
only runs for hcounter [56, 1078] — dot ~269.5 — ref-proj/ares/ares/sfc/ppu/main.cpp).
Ppu::tick_dot composites the finishing line here, one dot before this line’s own HDMA run
can observe/mutate the registers that composite reads, so an HDMA-driven per-line register
write during line V is only ever visible starting line V+1 — matching real hardware. This
is the single source of truth rustysnes-core::bus’s HDMA_RUN_DOT is defined equal to
(PPU-owned since it is fundamentally a video-timing fact, not a DMA-specific one); a #[test]
in rustysnes-core (which depends on this crate, not the reverse) asserts the two never
drift apart. See docs/ppu.md §Mid-scanline/HDMA-driven register timing for the full
mechanism and regression history.