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Module sharprtc

Module sharprtc 

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The Sharp S-RTC standalone real-time clock — the only commercial cart is Daikaijuu Monogatari II (an ExHiROM title; ares board EXHIROM-RAM-SHARPRTC).

Clean-room port of ares’ SharpRTC (ISC, sfc/coprocessor/sharprtc/): a 2-register ($2800 data, $2801 unused/pass-through) handshake that walks a 13-slot clock register file (second/minute/hour/day/month/year, each as one or two decimal digits, plus an auto-computed weekday) through a Ready -> Command -> Write or -> Read state machine driven entirely by magic values written to $2800 ($0D=enter read mode, $0E=enter command mode, then $00=write / $04=reset-to-epoch as the command byte). This is a DIFFERENT chip/protocol from crate::coproc::epsonrtc::EpsonRtc (the SPC7110-paired Epson RTC-4513) despite the similar name — distinct register windows, distinct handshake, distinct state machine, per ares treating them as two unrelated components.

Like EpsonRtc, this port seeds a fixed epoch and never advances the clock other than via explicit register writes (real wall-clock ticking would break this project’s determinism contract, docs/adr/0004); no released game logic depends on the clock’s absolute value, only on the read/write handshake completing.

No commercial Daikaijuu Monogatari II dump exists in this project’s local corpus, so this board has unit-test-level coverage only, not golden-framebuffer validation — the same honesty gap already carried openly for ExLoROM/PAL auto-detect (docs/adr/0003). The chipset-byte detection in crate::header is title-matched (best-effort, no cartridge database), mirroring the existing CX4/SPC7110 $F-nibble disambiguation.

Bus window (ares board EXHIROM-RAM-SHARPRTC): $00-3F,$80-BF:$2800-$2801 (the 2-byte handshake); ROM/SRAM otherwise delegate to the wrapped ExHiROM base board.

Structs§

SharpRtcBoard
An ExHiROM cartridge carrying a standalone Sharp RTC.