Enum M2Phase
pub enum M2Phase {
Low,
High,
}Expand description
Convention for the M2-phase reference relative to the CPU cycle’s 3 PPU dots.
In silicon the 6502 cycle has two halves — φ1 (M2 low; address valid; memory access) and φ2 (M2 high; data latch; interrupt sample). The host scheduler ticks the PPU 3 dots per CPU cycle. The convention this crate adopts:
M2Phase::Low— the first half of the cycle: from the start of the bus’s per-cycle tick through the end of PPU sub-dot 1 (corresponds to silicon’s φ1).M2Phase::High— the second half of the cycle: from the end of PPU sub-dot 1 through end-of-cycle (corresponds to silicon’s φ2). The M2-rising boundary lives between sub-dot 1 and sub-dot 2.
At end-of-cycle the bus advances its cycle counter and the phase
resets to M2Phase::Low for the next cycle.
This is the canonical reference enum used by the docs/ADR, by the
IRQ-timing tracing fixture (rustynes_core::irq_trace), and by
Bus::poll_irq_at_phase.
Variants§
Implementations§
Trait Implementations§
impl Copy for M2Phase
impl Eq for M2Phase
impl StructuralPartialEq for M2Phase
Auto Trait Implementations§
impl Freeze for M2Phase
impl RefUnwindSafe for M2Phase
impl Send for M2Phase
impl Sync for M2Phase
impl Unpin for M2Phase
impl UnsafeUnpin for M2Phase
impl UnwindSafe for M2Phase
Blanket Implementations§
Source§impl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
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fn borrow_mut(&mut self) -> &mut T
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