Expand description
COP0 — the VR4300 system control coprocessor (T-12-001).
The register file only: widths, writable-bit masks, and the four access instructions. The behavior the registers drive — exception dispatch (T-12-002), interrupts (T-12-003), address translation (T-12-004) — reads this module rather than living in it.
§Why this is table-driven
Almost every accuracy rule here is of the form “register N is 64 bits wide”
or “bits 23:16 of Config are hardwired to 0b00000110”. Those are data.
Written as data they can be asserted directly against the manual, one test
per table; written as match arms they become 32 places to forget one.
Two rules in particular cannot be derived and must simply be right:
- Which eight registers are 64 bits wide (
WIDE). There is no pattern. Getting one wrong is invisible until 64-bit software runs, and then presents as a truncated address rather than as a register bug. - Which bits accept writes (
WRITE_MASK). Hardware silently discards the rest; software reads back what it wrote minus those bits, and a too-permissive mask makes an emulator pass tests real hardware fails.
§Reset state
UM §6.4.4 (p. 183) defines only a handful of fields at cold reset and calls
the rest undefined: Index, EntryHi/EntryLo*/PageMask, LLAddr,
TagLo/TagHi, WatchLo/WatchHi, and most of Status. Undefined is not
license to be non-deterministic — ADR 0004 requires a reproducible machine —
so undefined fields are a documented zero, not entropy.
Modules§
- reg
- COP0 register numbers, by name.
Structs§
- Cop0
- The VR4300 system control coprocessor register file.
Enums§
- Cop0Op
- The COP0 access forms, decoded from the
rsfield of aCOP0instruction.
Constants§
- ARCH_
MASK - Per-register architecturally-defined bits — everything a read can ever return non-zero.
- WIDE
- The eight registers that are 64 bits wide; the other 24 are 32-bit.
- WRITE_
MASK - Per-register writable-bit masks. A
0bit is hardwired, reserved, or hardware-owned, and a write to it is discarded.