Module addr 

Virtual → physical address translation (T-11-006, T-12-004).

Every address the CPU hands to the crate::Bus is physical. This is where that becomes true: the MIPS segment map is applied here, inside the CPU crate, exactly as docs/cpu.md specifies.

The segment map

The map is not a property of the address alone: it depends on the privilege mode and on whether that mode is using 64-bit addressing. A segment that is perfectly ordinary in Kernel mode is an address error in User mode, and it is that check — not the TLB — that stops a user program reaching KSEG0. See Access.

Kernel, 32-bit addressing

Segment	Range	Mapping
KUSEG	0x0000_0000–0x7FFF_FFFF	TLB-mapped
KSEG0	0x8000_0000–0x9FFF_FFFF	direct, cached
KSEG1	0xA000_0000–0xBFFF_FFFF	direct, uncached
KSSEG/KSEG3	0xC000_0000–0xFFFF_FFFF	TLB-mapped

KSEG0 and KSEG1 are unmapped: they address the same physical memory and differ only in cacheability, so translation is a subtraction. That is why a ROM entry point of 0x8000_1000 and a hardware register at 0xA430_0000 both work without any TLB.

Supervisor and User, 32-bit addressing

Supervisor sees SUSEG (0x0000_0000–0x7FFF_FFFF) and SSEG (0xC000_0000–0xDFFF_FFFF), both mapped. User sees USEG (0x0000_0000–0x7FFF_FFFF) alone. Everything else is an address error, including the range that would be KSEG0.

64-bit addressing

With Status.KX/SX/UX set for the current mode, each mapped segment widens to 2^40 and the address space grows holes: an address inside a segment’s region but past its size is an address error, which is what the ..._gap cases in n64-systemtest’s privilege matrix check.

Kernel additionally gains XKPHYS, 0x8000_..–0xBFFF_..: eight 2^32 direct-mapped windows selected by bits 61:59, differing only in cacheability. Bits 58:32 must be zero or the access is an address error.

The compatibility segments CKSEG0–CKSEG3 sit at 0xFFFF_FFFF_8000_0000 upward and behave exactly as their 32-bit namesakes.

The mapped segments go through the TLB (translate_via).

An earlier translate masked mapped addresses to their low 29 bits — right for the identity mappings early boot code uses, wrong for anything else. It was deleted rather than kept “for unmapped-only paths” once nothing called it: an unused function that quietly gets translation wrong is exactly the inert-API hazard docs/engineering-lessons.md §3.2 describes.

Structs

Access

Everything outside the address itself that decides how it translates.

Physical

A translated address.

Enums

Cached

Whether an access goes through the caches.

Mode

The privilege mode an access is made in.

Segment

Which segment a virtual address falls in, and how it translates.

TranslateError

Why a translation failed.

Functions

segment

Classify a virtual address by segment (UM §5.2.4, Tables 5-3/5-4).

translate_via

Translate a virtual address, consulting the TLB for the mapped segments.