Trait IrqController 

pub trait IrqController {
    // Required methods
    fn enable(&self, irq: IrqNumber) -> KernelResult<()>;
    fn disable(&self, irq: IrqNumber) -> KernelResult<()>;
    fn acknowledge(&self, irq: IrqNumber) -> KernelResult<()>;
    fn eoi(&self, irq: IrqNumber) -> KernelResult<()>;
    fn set_priority(&self, irq: IrqNumber, priority: u8) -> KernelResult<()>;
    fn is_pending(&self, irq: IrqNumber) -> KernelResult<bool>;
}

Architecture-independent interrupt controller interface.

Each architecture implements this trait for its hardware interrupt controller (APIC, GIC, PLIC). The IrqManager delegates hardware operations through this trait.

Required Methods

fn enable(&self, irq: IrqNumber) -> KernelResult<()>

Enable an interrupt line so it can be delivered to the CPU.

fn disable(&self, irq: IrqNumber) -> KernelResult<()>

Disable an interrupt line to prevent delivery.

fn acknowledge(&self, irq: IrqNumber) -> KernelResult<()>

Acknowledge receipt of an interrupt.

On some architectures this is a separate step from EOI.

fn eoi(&self, irq: IrqNumber) -> KernelResult<()>

Signal end-of-interrupt to the controller.

Must be called after the interrupt handler has finished processing.

fn set_priority(&self, irq: IrqNumber, priority: u8) -> KernelResult<()>

Set the priority of an interrupt line.

The meaning of priority is architecture-dependent:

• x86_64 APIC: Not directly supported per-IRQ (no-op)
• AArch64 GIC: 0x00 = highest, 0xFF = lowest
• RISC-V PLIC: 0 = disabled, 1-7 = priority levels

fn is_pending(&self, irq: IrqNumber) -> KernelResult<bool>

Check whether an interrupt is pending.

Implementors