Module fast_path 

Fast path IPC implementation for register-based messages

Achieves < 1μs latency by using per-task IPC register storage for direct message transfer. When a sender targets a blocked receiver, the message is copied directly into the receiver’s Task::ipc_regs and the receiver is woken. No intermediate queuing or memory allocation is needed.

Performance features

• O(log n) PID lookup via global task registry (no linear scan)
• CapabilityCache (16-entry direct-mapped) for repeated IPC validation
• Tracepoints for IpcFastSend / IpcFastReceive / IpcSlowPath events

Register mapping

The IPC register convention maps to architecture registers as follows:

• x86_64: RDI, RSI, RDX, RCX, R8, R9, R10
• AArch64: X0, X1, X2, X3, X4, X5, X6
• RISC-V: a0, a1, a2, a3, a4, a5, a6

All share the same semantic layout (see IPC_REG_* constants below).

Structs

IpcBatch

IPC message batch for amortizing per-message overhead.

Constants

BATCH_SIZE

Maximum number of messages in a batch before automatic flush.

Functions

fast_receive

Fast path IPC receive

fast_send

Fast path IPC send for small messages

flush_batch

Flush an IPC batch (convenience function for external callers).

get_fast_path_stats

Get performance statistics (fast_path_count, avg_cycles, slow_path_fallbacks)

get_slow_path_count

Get the number of slow-path fallbacks