Expand description
x86_64 architecture support.
Provides hardware initialization (GDT, IDT, PIC, APIC), interrupt control, serial I/O (COM1 at 0x3F8), VGA text output, and I/O port primitives for the x86_64 platform.
Modules§
- acpi
- ACPI table parser for x86_64.
- acpi_pm
- ACPI Power Management for x86_64.
- apic
- Local APIC and I/O APIC support for x86_64.
- boot
- x86_64 boot entry point using the
bootloadercrate. - bootstrap
- context
- x86_64 context switching implementation
- cpufreq
- CPU Frequency Scaling via MSR for x86_64.
- dpms
- DPMS (Display Power Management Signaling) for x86_64.
- early_
serial - entry
- x86_64 kernel entry point and panic handler.
- gdt
- idt
- Interrupt Descriptor Table
- kpti
- Kernel Page Table Isolation (KPTI) for x86_64
- mmu
- x86_64 Memory Management Unit (MMU) support
- msr
- Model-Specific Register (MSR) read/write primitives.
- multiboot
- pat
- Page Attribute Table (PAT) initialization for write-combining memory.
- rtc
- CMOS Real-Time Clock (RTC) reader for x86_64.
- serial
- x86_64 serial port driver for kernel debugging output.
- syscall
- x86_64 system call entry point and SYSCALL/SYSRET MSR configuration.
- timer
- x86_64 timer implementation
- usermode
- User-mode entry point for x86_64
- vga
Constants§
- HEAP_
START - Kernel heap start address (mapped by bootloader 0.9)
Functions§
- disable_
interrupts - enable_
interrupts - Enable hardware interrupts.
- enable_
keyboard_ irq - Unmask the keyboard IRQ (IRQ1) on PIC1.
- enable_
timer_ irq - Unmask the timer IRQ (IRQ0) on PIC1.
- halt
- Halt the CPU. Used by panic/shutdown paths via
crate::arch::halt(). - idle
- inb⚠
- Read a byte from an x86_64 I/O port.
- init
- Called from bootstrap on x86_64 via
crate::arch::init(). - inl⚠
- Read a 32-bit dword from an x86_64 I/O port.
- inw⚠
- Read a 16-bit word from an x86_64 I/O port.
- outb⚠
- Write a byte to an x86_64 I/O port.
- outl⚠
- Write a 32-bit dword to an x86_64 I/O port.
- outw⚠
- Write a 16-bit word to an x86_64 I/O port.
- serial_
init - speculation_
barrier - Speculation barrier to mitigate Spectre-style attacks. Uses LFENCE which serializes instruction execution on Intel/AMD.
- tlb_
flush_ address - Flush TLB for a specific virtual address. Called via
crate::arch::tlb_flush_address(). - tlb_
flush_ all - Flush entire TLB. Called via
crate::arch::tlb_flush_all().