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Module scheduler

Module scheduler 

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Scheduler-facing types the CPU crate exposes to its bus host.

Currently exposes only M2Phase, the canonical reference enum for “which half of the 6502 cycle the host bus is currently in”. The enum lives in rustynes-cpu rather than rustynes-core because it used to parameterise the Bus::poll_irq_at_phase trait method, which v2.9.8 removed with the rest of the v2.7.5 deprecations (ADR 0042). It survives as the vocabulary of the IRQ-timing trace (rustynes_core::irq_trace), and rustynes-core consumers keep importing it from rustynes_core::scheduler via re-export.

See docs/scheduler.md and docs/adr/0002-irq-timing-coordination.md for the surrounding design.

Enums§

M2Phase
Convention for the M2-phase reference relative to the CPU cycle’s 3 PPU dots.