Skip to main content

Module scheduler

Module scheduler 

Source
Expand description

Scheduler-facing types the CPU crate exposes to its bus host.

Currently exposes only M2Phase, the canonical reference enum for “which half of the 6502 cycle the host bus is currently in”. The enum lives in rustynes-cpu rather than rustynes-core because the Bus trait method Bus::poll_irq_at_phase is parameterised by it; the CPU crate stays at the top of the workspace dep graph (rustynes-core already depends on rustynes-cpu, not the other way round) and any rustynes-core consumer continues to import M2Phase from rustynes_core::scheduler via re-export.

See docs/scheduler.md and docs/adr/0002-irq-timing-coordination.md for the surrounding design.

Enums§

M2Phase
Convention for the M2-phase reference relative to the CPU cycle’s 3 PPU dots.